SpacemiT K3
2026-08-1416 min read

SpacemiT K3: Flagship RISC-V AI CPU Deep Dive

At the 5th Dishui Lake China RISC-V Industry Forum, SpacemiT detailed the K3 — the first mass-production RISC-V chip to claim RVA23 compliance, 1024-bit RVV, native FP8 inference, and full chip-level virtualization. We break down the architecture, benchmarks, and what it means for the RISC-V ecosystem.

K3RVA23X100A100AI CPU60 TOPSRobotics

Overview

On August 13, 2026, at the 5th Dishui Lake China RISC-V Industry Forum in Shanghai, SpacemiT market director Peng Huacheng presented the company's flagship Key Stone K3 SoC. Positioned as a "CPU 2.0" part that fuses general-purpose compute and AI acceleration on one die, K3 is SpacemiT's answer to the question of whether RISC-V can compete in high-performance computing and edge AI.

The presentation emphasized four claimed world-firsts for a mass-production RISC-V chip: RVA23 Profile compliance, 1024-bit RVV vector width, native FP8 inference, and complete chip-level virtualization. SpacemiT also disclosed real-world LLM benchmarks and a humanoid-robot half-marathon demonstration.

K3 Key Specifications

ParameterValue
Product PositioningFlagship RISC-V AI CPU / "CPU 2.0"
CPU Cores8x SpacemiT X100 @ up to 2.4 GHz
Real-Time Cores2x RISC-V real-time cores
AI Cores8x SpacemiT A100
General Compute~130K DMIPS
AI Compute60 TOPS
MemoryUp to 32 GB LPDDR5
Real-Time Cache3 MB real-time compute cache
CAN-FD10x CAN-FD interfaces
CPU ISARVA23 Profile (64-bit application processor)
Vector ExtensionRVV 1.0, 1024-bit VLEN
Precision SupportNative FP8 inference
VirtualizationFull chip-level virtualization (RVH)
Single-Core Perf~9 SPECint2006/GHz (X100, comparable to ARM Cortex-A76)
SoftwareUbuntu, Bianbu Linux, OpenKylin, openEuler, ROS2

Four Claimed World-Firsts

SpacemiT highlighted four features that it says are firsts for a mass-production RISC-V chip:

X100 and A100: The Compute Blocks

K3 is built from SpacemiT's self-designed X100 application cores and A100 AI cores. SpacemiT's roadmap shows a clear performance escalation:

CoreMicroarchitectureSPECint2k6/GHz
X60Dual-issue, 8-stage pipeline~4
X100Quad-issue, 12-stage out-of-order~9
X200Six-issue, 10-stage~16
X300 (2027 target)Next-gen high-performance~20

The A100 AI cores scale from the edge-class A60 (2 TOPS) through the desktop-class A100 (32 TOPS per core class) to the server-class A200 (256 TOPS). On K3, eight A100 cores deliver a combined 60 TOPS of general AI compute.

On-Device LLM Benchmarks

SpacemiT showed that K3 can run most models on HuggingFace that do not rely on FP4/FP6 formats. One concrete benchmark disclosed at the forum:

ModelFirst-Token LatencyThroughput
Qwen 30B-A3B0.9 s~15 tokens/s

The company also stated that K3 can run 30B-parameter class models locally, putting it in the same conversation as entry-level AI PC and edge-NPU platforms, but on a fully open RISC-V ISA.

Real-Time Subsystem for Robotics

K3 includes a dedicated real-time computing domain for embodied AI and robotics:

This "motion-control + AI" architecture is intended to replace the traditional CPU + MCU + NPU three-chip partition, reducing inter-chip latency and improving system stability. SpacemiT demonstrated the concept on April 19, 2026, when multiple "Linglong 2.0" humanoid robots powered by K3 completed the Beijing Yizhuang Humanoid Robot Half Marathon (21.0975 km). The chips had only been back from tape-out for about two months at that point.

Software and Open-Source Ecosystem

SpacemiT said that K3 source code was pushed to the mainline Linux kernel at launch, making it the first mass-production chip to fill the RVA23 kernel gap. The company lists active upstream work across GCC, LLVM, Ubuntu, OpenKylin, and openEuler.

Available software support includes:

SpacemiT Roadmap

Product LineCurrent / PlannedNotes
K seriesK1, K3 in production; K5, K7 plannedEdge to AI-compute SoCs
V seriesV100 taped out; V200 in developmentServer-oriented chips
AI coresA60, A100 in production; A200 coming2 / 32 / 256 TOPS classes
CPU coresX60, X100 in production; X200 ready, X300 2027Performance scaling to 20 SPECint2k6/GHz

K3 vs K1: What Changes

FeatureK1K3
CPU8x X60 @ 1.6 GHz8x X100 @ 2.4 GHz
DMIPS~50K~130K
AI2 TOPS60 TOPS
MemoryLPDDR4X up to 16 GBLPDDR5 up to 32 GB
ISA ProfileRV64GCVRVA23 + RVV 1024-bit
LLM Scale0.5-1B paramsUp to 30B params local
Real-Time DomainLimited2x RT cores + 3 MB cache + 10x CAN-FD

Resources

Multi-Language Summary

EN: SpacemiT K3 is a flagship RISC-V AI CPU with 8x X100 cores @ 2.4 GHz, 8x A100 AI cores delivering 60 TOPS, and up to 32 GB LPDDR5. It is the first mass-production RISC-V chip to claim RVA23 compliance, 1024-bit RVV, native FP8, and full virtualization.

RU: SpacemiT K3 — флагманский AI CPU на базе RISC-V с 8 ядрами X100 @ 2,4 ГГц, 8 ядрами A100 (60 ТОПС) и до 32 ГБ LPDDR5. Первый серийный чип RISC-V с заявленной поддержкой RVA23, 1024-битного RVV, нативного FP8 и полной виртуализации.

ES: SpacemiT K3 es una CPU AI RISC-V insignia con 8 núcleos X100 @ 2,4 GHz, 8 núcleos A100 de 60 TOPS y hasta 32 GB LPDDR5. Es el primer chip RISC-V en producción masiva con RVA23, RVV de 1024 bits, FP8 nativo y virtualización completa.

FR: Le SpacemiT K3 est un CPU AI RISC-V phare avec 8 cœurs X100 @ 2,4 GHz, 8 cœurs A100 de 60 TOPS et jusqu'à 32 Go de LPDDR5. Premier chip RISC-V en production de masse à revendiquer la conformité RVA23, le RVV 1024 bits, le FP8 natif et la virtualisation complète.

DE: Der SpacemiT K3 ist ein Flaggschiff-RISC-V-AI-CPU mit 8 X100-Kernen @ 2,4 GHz, 8 A100-Kernen mit 60 TOPS und bis zu 32 GB LPDDR5. Erster RISC-V-Chip in Massenproduktion mit behaupteter RVA23-Konformität, 1024-Bit-RVV, nativem FP8 und vollständiger Virtualisierung.

FA: SpacemiT K3 یک CPU AI پرچم‌دار RISC-V با ۸ هسته X100 با فرکانس ۲.۴ گیگاهرتز، ۸ هسته A100 با ۶۰ TOPS و تا ۳۲ گیگابایت LPDDR5 است. اولین چیپ RISC-V تولید انبوه با مطابقت RVA23، RVV ۱۰۲۴ بیتی، FP8 بومی و مجازی‌سازی کامل.

Conclusion

The K3 is SpacemiT's most aggressive RISC-V part yet. By combining a modern out-of-order CPU, wide-vector units, native low-precision AI formats, and virtualization in a single mass-production chip, it targets the same AI PC, robotics, and edge-server use cases that ARM and x86 currently dominate. Whether the four world-first claims hold up over time, the device is already in public demonstrations and shipping hardware, which makes it a concrete data point in the "RISC-V enters high-performance computing" narrative.