An open-source hardware testing platform brings CI/CD automation and AI agent integration to the $0.10 CH32V003 RISC-V MCU, with GitHub Actions, self-hosted runners, and remote development capabilities.
A remarkable open-source project from the 11th Lichuang Electronic Design Contest demonstrates how to build a fully automated firmware testing system for the WCH CH32V003 RISC-V MCU — integrating GitHub Actions CI/CD, self-hosted hardware runners, and even AI agent-driven development.
This project represents a significant step forward in RISC-V MCU development workflows, bringing professional-grade continuous integration to a $0.10 microcontroller.The CH32V003 Automatic Firmware Test System is a hardware testing platform that can automatically compile, flash, and test firmware on real CH32V003 chips. Created by developer Deqing Sun, the system uses an analog switch matrix to route any pin of the target CH32V003 to any instrument pin, enabling comprehensive automated testing without manual intervention.
The project is fully open-source under the MIT license, with hardware designs on Lichuang Open Source Platform and software on GitHub.The test board is built around two WCH RISC-V MCUs and an analog switch matrix:
Controller: CH32V305CCT6 — This is the brain of the test system. It was selected for its large RAM (192KB usable for signal capture), consecutive PA0-PA7 pins suitable for DMA operations, and full ADC capability on all 8 channels. PA4 and PA5 also provide DAC output. The controller manages the switch matrix, performs digital/analog I/O, and functions as a basic logic analyzer and oscilloscope. Debugger: CH32V305FBP6 — Running the official WCH-LinkE firmware, this chip handles target programming and debugging. It also controls the 5V and 3.3V power supply to the target chip. Switch Matrix: 2x CH446Q — Two analog switch chips form a 32x8 routing matrix. The 8 Y-lines connect to the controller's PA0-PA7, while the 32 X-lines cover all 20 pins of the SSOP20 test socket, 5 debugger pins, and 7 external header pins. This allows any target pin to be connected to any instrument pin dynamically. USB Hub: CH334F — A USB hub chip splits one upstream USB port into four downstream ports. The hub's PWREN pin controls a PMOS transistor that can power-cycle the entire board — useful for hard resets during testing.The target CH32V003 sits in an SSOP20 test socket, making it easy to swap chips. Power can be selected between 3.3V and 5V via jumpers.
The automated testing workflow leverages GitHub Actions for CI/CD:
The self-hosted runner approach is essential because GitHub's cloud runners cannot physically connect to hardware. The Raspberry Pi runs as a persistent self-hosted runner, automatically picking up hardware test jobs.
A key design decision: hardware tests only run on push events or manual triggers, not on pull requests. This prevents malicious PR code from executing on the physical test hardware.Perhaps the most innovative aspect is the AI agent integration. The project demonstrates using Cursor's Agent mode to write, flash, and test CH32V003 firmware entirely through AI:
In the documented example, the AI agent successfully drove a WS2812 LED strip after approximately 3 minutes and 3 iterations — entirely autonomous.
This is significant because it demonstrates a complete "Observe, Reason, Act, Update Context" loop for embedded development. The test board's built-in logic analyzer and signal capture capabilities are what make this possible — the AI agent can "see" the results of its code without human intervention.The project also includes a web-based remote development interface. A live demo is accessible at https://ch32v003.thinkcreate.us/ where users can:
This transforms the test board into a mini "Lab on the Cloud" — similar to commercial remote hardware platforms but at a fraction of the cost.
This project showcases several important trends:
Professional CI/CD for Budget MCUs — The CH32V003 costs approximately $0.10, yet this project brings enterprise-grade automated testing to it. This democratizes quality assurance for small-scale and hobbyist projects. AI-Augmented Embedded Development — The AI agent integration demonstrates that with the right hardware bridge (logic analyzer, signal capture), AI can handle the entire embedded development loop. As AI agents become more capable, this approach will become increasingly practical. Open Source Hardware Testing — The full design — schematics, PCB, firmware, and test scripts — is open source. This allows anyone to build their own test system and adapt it to other RISC-V MCUs.For developers working with WCH RISC-V MCUs, this project is particularly relevant. The CH32V003 ($0.1, RV32EC, 48MHz) is the entry-level chip, but the same testing methodology can be applied to more capable chips like the CH32V208 ($1, BLE 5.3), CH32V307 ($3, Gigabit Ethernet), and CH32V317 ($4, USB 480Mbps). The new CH32V407 with RISC-V V vector extension and dual high-speed USB would be an excellent candidate for similar automated testing.
The CH32H417 ($6, USB 3.0, dual-core RISC-V) with its 5Gbps SuperSpeed USB capability could also benefit from this kind of automated test infrastructure, especially for USB protocol compliance testing.For those interested in CH32V003 and other WCH RISC-V MCUs, our platform offers chips, development boards, and SDK resources. The CH32V003 is an excellent starting point for RISC-V embedded development, and projects like this test system show how far the ecosystem has matured.