RISC-V KVM in Linux 7.4: KVM_PRE_FAULT_MEMORY, Four More Guest Extensions, IMSIC Raw Lock

The pull request

On 22 October 2026 at 05:51 PDT, Anup Patel sent [GIT PULL] KVM/riscv changes for 7.4 to Paolo Bonzini. The tag is kvm-riscv-7.4-1 from https://github.com/kvm-riscv/linux.git, based on Linux 7.3-rc5 (2026-09-27) and ending at commit 633b3931a87438282d6454646ff40c669a6896cb, "KVM: riscv: selftest: add Zicclsm, Ziccamoa, Ziccif, Za64rs", dated 2026-10-22.

The whole pull is 17 files changed, 246 insertions, 141 deletions. Small, which is the point: KVM/riscv is no longer adding architecture, it is adding features and fixing corners.

Patel noted the PR arrived late because he was on vacation the previous week.

Seven headline changes and four fixes

The PR lists seven features:

1. Lazy V-extension enablement for KVM selftests
2. KVM_PRE_FAULT_MEMORY ioctl, plus the corresponding selftests
3. sepc/scause/stval CSRs shown in KVM selftest vCPU dumps
4. A raw lock for IMSIC wakeup state
5. Rejecting vCPU creation after AIA initialization
6. Updated next branch name in the KVM/riscv MAINTAINERS entry
7. Allowing Zicclsm, Ziccamoa, Ziccif and Za64rs in KVM guests

Plus four fixes and minor improvements: avoid a redundant interrupt check for pending timers, fix the build with vector support disabled, fix IPI delivery for out-of-order vcpu_id, and replace IMSIC switch-case macros with range checks.

KVM_PRE_FAULT_MEMORY comes to RISC-V

This is the most consequential item for people actually running VMs. KVM_PRE_FAULT_MEMORY lets userspace populate guest memory before the guest touches it, instead of paying a stream of stage-2 page faults during startup.

It matters most where it always matters: large guests, and guests whose latency budget is tight. Adding it to RISC-V puts the architecture's hypervisor on the same footing as the other KVM ports for a feature that shows up directly in VM boot time. Jinyu Tang contributed the implementation along with Sv57 page-table indexing in the selftests and enabling pre_fault_memory_test for RISC-V.

Four more extensions visible to guests

Heinrich Schuchardt's pair of patches allows Zicclsm, Ziccamoa, Ziccif and Za64rs in a KVM guest, with a matching selftest.

This is more significant than it looks. These are the cache-coherency and atomicity extensions — Zicclsm (cache-line sizes and misaligned access behaviour), Ziccamoa (atomic operations on main-memory regions), Ziccif (cache and Instruction Fetch) and Za64rs (64-byte reservation set). A guest that cannot see them has to fall back to different code paths for anything depending on coherence or LR/SC semantics. Exposing them is a prerequisite for a guest to behave the way a modern RVA23 userspace expects, rather than a special case.

IMSIC: raw lock and range checks

Andrew Jones contributed two changes to the AIA/IMSIC path: replacing switch-case macros with range checks, and switching the IMSIC wakeup state to a raw spinlock. Xiaofeng Yuan fixed IPI delivery for out-of-order vcpu_id.

Taken together these are the normal maturation pattern for an interrupt-virtualization path that has been exercised hard. IMSIC is the RISC-V incoming MSI controller, and getting wakeup and IPI routing right under a hypervisor is where MSI-heavy guests — anything with virtio-net multiqueue or NVMe — tend to expose bugs.

Also worth noting: rejecting vCPU creation after AIA initialization closes a genuine hole. Creating vCPUs after the interrupt architecture is live leaves the VM in a state that cannot be correctly described, and failing loudly is better than failing later.

Selftest infrastructure keeps growing

Yong-Xuan Wang added sepc/scause/stval to vcpu_arch_dump(), which is the kind of change that pays for itself the first time a guest triple-faults in CI. Combined with lazy V enablement, the Sv57 indexing work and the new extension test, the RISC-V selftest suite is accumulating coverage at a reasonable rate — an underrated signal of hypervisor maturity.

What is deliberately not in this pull

Several KVM/riscv patches were discussed on the list during the same window but are not in this PR, including the SiFive P550 envcfg quirk, the G-stage dirty-log write-fault fixes, SBI DBTR extension forwarding, and the split page cache double-free fix. This pull is the 7.4 feature set; those items travel on their own path.

Not disclosed in the PR text: any performance measurement for KVM_PRE_FAULT_MEMORY on RISC-V, or which hardware the selftests were validated against.

Why this matters for RISC-V server planning

Virtualization is the gate between "RISC-V works as a board" and "RISC-V works as a server". Each cycle that adds a mainstream KVM feature — pre-faulting, correct guest ISA exposure, reliable MSI delivery — removes one reason a hypervisor-scale deployment would need a workaround. The trend across 7.3 and 7.4 is consistent: fewer architecture gaps, more parity work.

Sources

• linux-riscv, [GIT PULL] KVM/riscv changes for 7.4, Anup Patel, 22 October 2026 — https://lists.infradead.org/pipermail/linux-riscv/2026-October/101959.html
• linux-riscv October 2026 archive by subject (for the related patches not included in the PR) — https://lists.infradead.org/pipermail/linux-riscv/2026-October/subject.html
• KVM/riscv tree — https://github.com/kvm-riscv/linux.git