Silicon reviews, MCU tutorials, OpenWrt guides and ecosystem analysis — written for engineers evaluating RISC-V for production.
27 articles · updated September 01, 2026
GigaDevice GD32VW553 is a Nuclei N307 32-bit RISC-V wireless MCU with integrated 2.4 GHz Wi-Fi 6 (802.11ax OFDMA + MU-MIMO) and Bluetooth LE 5.2 radio, 4 MB Flash, 320 KB SRAM, hardware AES/DES/Hash/PKCAU/TRNG, Matter-over-Wi-Fi certified. QFN32/QFN40, -40 to 105 °C.
GigaDevice CCRC4XXX automotive AI MCU pairs CRV6 RISC-V cores with native post-quantum crypto (PQC), on-chip NPU, and Evita-Full HSM. Full spec deep-dive plus China's first RISC-V vehicle-control-chip standard from the Suzhou Automotive Summit.
Zhongda Tech's SpacemiT K3-based industrial edge AI module delivers 60 TOPS in a Mini COM-E form factor. 8 X100 cores, 8 A100 AI cores, 30B LLM inference, -40 to 70°C, all-domestic supply chain.
SiFive BigSky SF-2U870 is the world's first enterprise-grade rackable 2U RISC-V server. Deep dive into P870-D cores, DDR5-5600, PCIe Gen5, NVMe, and CUDA/NVLink Fusion support.
WCH's CH32X035 is the first QingKe RV32IMAC MCU with integrated USB 2.0 + USB PD + Type-C PHY, PIOC programmable I/O controller, dual OPA, triple CMP, 12-bit ADC and 65 KB Flash — collapsing any external PD trigger chip.
Andes RVBuilder brings RISC-V toolchain management, debugging and MCP-based AI assistance into Visual Studio Code. Cross-platform for Windows and Linux.
Technical deep dive into Timesintelli PT153S, a fully-domesticated RISC-V (RV32IMAC) USB 3.2 Gen1 to Gigabit Ethernet controller chip that shipped over 1M units in three months.
Technical deep dive into HPMicro HPM53M1, a 480MHz RISC-V MCU with integrated 150V motor drivers, 4x CAN-FD, and 2MSPS ADC designed for robot joint servo control.
Technical overview of SpacemiT K3 Pico-ITX, a 2.5-inch Pico-ITX plus SBC built around the 60 TOPS RVA23 K3 AI CPU with 10GbE, NVMe, and dual M.2 expansion.
Technical deep dive into SpacemiT K3, the world's first RVA23 mass-production RISC-V AI CPU: X100 cores, A100 AI engines, 60 TOPS, and four claimed world-first features.
Deep dive into the myCobot 280 RISC-V, the world's first 6-axis collaborative robot arm powered by the SpacemiT K1 RISC-V AI CPU with full-stack open-source design.
Deep dive into XiangShan Kunming Lake open-source RISC-V processor and the Ruyi native operating system for RISC-V.
Deep dive into the 金刚GC3 chip by 中科通量: 12 RISC-V cores, 200 TOPS INT8, 128GB LPDDR5 ECC unified memory, dataflow architecture designed for video generation and understanding.
Deep dive into Epic Semi Contrail AIX: 32 server-class RISC-V scalar cores + 16 integrated AI cores, up to 75 TOPS (INT8), RVA23, RVV 1.0 + VME, DDR5-6400, PCIe Gen5, CXL 2.0, hypervisor + AIA 1.0. Built for the Agentic AI Era.
Deep dive into the XCENA MX1 computational-memory device: 3,072 RISC-V cores, Samsung 4nm, 2TB DDR5, CXL 3.2, vector search and near-data processing. Hot Chips 2026 analysis.
Reading about RISC-V is one thing — shipping it is another. MeToclaw builds production-ready industrial and IoT hardware; BESTOM provides custom ODM design and volume manufacturing.