Schematic capture, custom PCB layout, SI/PI simulation and enclosure design for RISC-V based products — starting from official reference designs so you are not debugging a power rail from scratch.
| Starting point | Official WCH evaluation boards and SpacemiT reference designs are used as the electrical baseline. Schematic, BOM and layout constraints are published by the vendor and reviewed before any change is made. |
|---|---|
| Layout | Custom carrier boards, baseboards and IO expansion. Stack-up and impedance control for Gigabit Ethernet, USB High-Speed and MIPI-CSI where the design carries them. |
| Simulation | Signal and power integrity review on high-speed nets. DDR and LPDDR5 routing on SpacemiT K3 designs gets length-matching review. |
| Mechanical & thermal | Enclosure fit and thermal budget. Relevant for the K3, which is specified at 15-25 W TDP and needs a real heatsink plan, not a heat spreader sticker. |
Do you start from scratch or from a reference design?
From the vendor reference design wherever one exists. It removes the highest-risk part of the schedule — the power and clock bring-up — and keeps the design inside the vendor's validated envelope.
Can you work with our own schematic?
Yes. We also do design review only: netlist, decoupling, reset and boot sequencing, high-speed routing.